Host-Target Protocol

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Detailed Description

Hardware connections

The protocol uses the MISO, MOSI and SCK lines of the AVR. The AVR is setup as a SPI slave and the PC is the SPI master. MOSI is tied to SS; PC controls the SS through the MOSI. line.

- PC -+                  +- AVR -
      |                  |
MISO  |------------<---- | MISO
      |                  |
MOSI  |------------>---- | MOSI
      |              |   |
      |              +-- | _SS
      |                  |
SCK   |------------>---- | SCK
------+                  +-------

Low-level protocol

Transmit from Target (AVR/Slave) to Host (PC/Master)

1. Slave sets MISO high to indicate to master that it wants to send
2. Slave waits for a transfer complete (this will potentially send a zero to the host).
3. Slave reset MISO to high
4. Master drives SS low (by driving MOSI low). When SS is driven low the MISO line is connected to the SP shift register
5. Clocks SCK
6. Reads bit from MISO before falling edge of SCK
7. Releases SS to high indicating to slave that transfer is complete
8. Since MOSI was driven low the SPI shift register contains zeros

Receive & transmit from target, setup is sck rising edge

                                7   6   5   4   3   2   1   0
                 ____________ ___ ___ ___ ___ ___ ___ ___ ___     
 MISO (trg)_____/          \_X___X___X___X___X___X___X___X___\___/\_________
                .                                                   .
           ________________                                       ____________ 
   SS (pc)                 \_____________________________________/  .   
                .          .                                     .  .   
           ______________  .  _   _   _   _   _   _   _   _   ________________  
  SCK (pc) ______________\___/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/________________ 
                .        . . . . . . . . . . . . . . . . . . .   .  .  .
                .....0....1.2.3.2.3.2.3.2.3.2.3.2.3.2.3.2.3.2..4....5...
               [A]        [B]                               [C] [D]

• Note [A]: Target drives MISO low to request that a byte should be transferred
• Note [B]: When SS goes low avr hardware takes control of MISO
• Note [C]: After bit zero MISO will go to zero because zeros have been shifted into the shift register.
• Note [D]: Target reads SCLK when SS goes high
• Note [D]: Target reads SCLK when SS goes high

• 0: Slave clock request response time
• 1: #TargetComm::SPI_SS_SETUP_DELAY
• 2: #TargetComm::SPI_SCK_LOW_DELAY
• 3: #TargetComm::SPI_SCK_HIGH_DELAY
• 4: #TargetComm::SPI_SCK_TX_DELAY or zero if no bit to transmit
• 5: #TargetComm::SPI_SS_RELEASE_DELAY or TargetComm::SPI_SS_TX_RELEASE_DELAY

Flow and byte level protocol

All bytes sent from the target are in the following ranges:

• [0x00] AVR_MONITOR_NODATA
• [1..127] Debug trace information from application running in AVR
• [128..255] Data from debug monitor

• AVR_MONITOR_READY_TO_RECEIVE
• AVR_MONITOR_SIGTRAP
• AVR_MONITOR_READY_TO_RECEIVE
• avr_monitor_cmd_t

Each byte transmitted to the target is transmitted as 24 bits; each byte is by a 0011111111110000 header.

High level protocol

When the target is in running the monitor it sends a byte, AVR_MONITOR_SIGTRAP. When this is read from the target by the host switches to monitor mode and is ready to receive commands from the debugger.

Command packet host<->target

• AVR_MONITOR_CMD_READ_FLASH Read program memory
  • cmd = 0xC1 addr = [address to read] length = [bytes to read]
  • cmd = 0xC1 addr = [address read] length = [bytes read] buffer = [data]
• AVR_MONITOR_CMD_READ_SRAM Read SRAM or IO area memory
  • cmd = 0xC2 addr = [address to read] length = [bytes to read]
  • cmd = 0xC2 addr = [address read] length = [bytes read] buffer = [data]
• AVR_MONITOR_CMD_WRITE_SRAM Write SRAM or IO area
  • cmd = 0xC3 addr = [address to write] data = [byte to write]
  • cmd = 0xC3 addr = [address written] length = [1] buffer = [byte written]
• AVR_MONITOR_CMD_GET_MON_DATA Get monitor data (ram and flash addresses)
  • cmd = 0xC4 addr = [0x0000] length = [AVR_MONITOR_SIZEOF_DATA_INFO]
  • cmd = 0xC4 addr = [0x0000] length = [AVR_MONITOR_SIZEOF_DATA_INFO] buffer = [avr_monitor_data_info_t]
• AVR_MONITOR_CMD_EXIT
  • cmd = 0xC0 addr = [0x0000] data = [avr_monitor_run_mode_t]
  • cmd = 0xC0 addr = [0x0000] data = [avr_monitor_run_mode_t]

\

Defines

• #define AVR_MONITOR_SIGTRAP
• #define AVR_MONITOR_READY_TO_RECEIVE
• #define AVR_MONITOR_NODATA

Enumerations

• enum avr_monitor_cmd_t {
    AVR_MONITOR_CMD_EXIT,
    AVR_MONITOR_CMD_READ_FLASH,
    AVR_MONITOR_CMD_READ_SRAM,
    AVR_MONITOR_CMD_WRITE_SRAM,
    AVR_MONITOR_CMD_GET_MON_DATA,
    AVR_MONITOR_CMD_NOP
  }
• enum avr_monitor_run_mode_t {
    avr_monitor_continue,
    avr_monitor_step_asm_instruction,
    avr_monitor_step_to_next_bp
  }

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Define Documentation

#define AVR_MONITOR_SIGTRAP

Character sent by target to indicate that it is switching to monitor mode.

#define AVR_MONITOR_READY_TO_RECEIVE

Sent by target to indicate that it is in receive mode.

#define AVR_MONITOR_NODATA

Byte sent when monitor have no data to send Must be zero since the shift register is filled with zeros after a transfer

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Enumeration Type Documentation

enum avr_monitor_cmd_t

Command to monitor in target. Enumeration values: AVR_MONITOR_CMD_EXIT  Exit monitor. See avr_monitor_run_mode_t. AVR_MONITOR_CMD_READ_FLASH  Read program memory. AVR_MONITOR_CMD_READ_SRAM  Read SRAM. AVR_MONITOR_CMD_WRITE_SRAM  Write byte to SRAM. AVR_MONITOR_CMD_GET_MON_DATA  Get address of monitor data and flashed breakpoints. AVR_MONITOR_CMD_NOP  No operation.

enum avr_monitor_run_mode_t

Monitor run mode. Enumeration values: avr_monitor_continue  Go. Do not break on software breakpoints. avr_monitor_step_asm_instruction  Step next asm instruction. avr_monitor_step_to_next_bp  Step asm instructions until breakpoint.

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